Rita Glover, EDA Today, L.C.
September 2002
More than 9,500 designers, engineers, managers, industry analysts,
scholars, and exhibitors from leading global companies and universities
attended the 39th Design Automation Conference (DAC) held in New Orleans
June 10-14, 2002.
The major topic at DAC was EDA hardware design tools in support of large
complex Systems on a Chip (SOCs). This year’s conference included a
special focus on SOC verification and embedded systems design, bringing the
software aspect up to a level equal to hardware design.
The Software Perspective
In one of the conference’s keynote speeches, Jerry Fiddler, chairman and
co-founder of Wind River Systems, emphasized that electronic design
automation does not just mean designing silicon hardware. The software
point of view looks through the other side of the same mirror -- one which
has often been ignored by the EDA industry.
The challenge today is how we will build and manage hundreds of billions
of connected devices reliably and securely. Information and
intelligence is becoming pervasive in our world. The infrastructure is
becoming intelligent, and everything communicates. Power has become
very expensive, due to large-scale factors like geopolitics, global warming,
and energy crises, as well as small-scale factors like wireless
communications, in-body devices, and long-term product lifecycles.
Economic issues also play a big role. Companies are being starved
for capital in today’s business climate. The communications market – a
major market driver -- is in chaos, with service providers carrying a huge
debt load (totaling around $1.5 trillion), and broadband deployments moving
slowly in most countries. Some sectors such as automotive, industrial,
and military/aerospace are doing fairly well, but consumer spending is down
and a recovery is very hard to predict. Some analysts do not expect
spending in technology sectors to regain its 2000 level until 2004.
In addition, many companies – especially in the communications industry
-- have huge internal issues, because they often have not successfully
integrated the many acquisitions they were making before 2001. With
major reductions in force, management turmoil, a diluted focus, and
different cultures, these acquisitions have generally turned out not to be a
panacea. As a result, projects are being cancelled, fewer projects are
being started, and volume purchases are being reduced. Rather than
“designing themselves out of a recession,” companies are becoming more
risk-averse. Instead, they are doing less innovation and more
retooling of old designs in their next-generation products.
At the same time, there is a lot more silicon variety, more rapid design
cycles, and higher levels of integration using multiple cores. The use
of programmable logic is increasing, and it proliferates into all kinds of
intelligent, programmable platforms, 98% of them embedded.
Historically, processors have seen around 15% growth per year, but today
there is a much greater variety of processors -- 59 new architectures in 12
months -- all of which must be supported by the software world.
Fiddler sees a growing need for hybrid devices that contain both hard
cores and programmable gates. Programmable devices are going to be
very important, in his opinion, because products require reconfigurable
systems that can be updated in the field over a lifespan as long as decades.
The flexibility of these devices will turn out to be more a important
consideration than their initial unit cost.
In the software world, difficult new challenges are being created by the
many new types of silicon. Design methodologies must change from
device-centric, to connection-centric, to system-centric. Much higher
levels of functionality are needed, and complexity is increasing because
everybody is trying to do more in a shrinking market (and perhaps it is only
shrinking temporarily). The focus today is on reducing customers’ cost
through more functionality, better integration, and more services.
As the silicon changes, the more rapid microprocessor generations require
new models, both technical and business. For reconfigurable designs,
every application could require different kinds of silicon which all need to
be addressed in software. Multiple processors require heterogeneous
multi-processing on a chip -- a very hard problem for programmers. For
reconfigurable computing, how are the tasks partitioned? With all
these new kinds of complexity, how will all the intellectual property (IP)
be generated for SOCs?
How much software is now needed? In 1995, a typical embedded
product used 100,000 lines of code and was a standalone, unmanaged,
fixed-function device. In 2002, a typical embedded product contains a
million lines of code, and it is a networked, managed, and programmable
device that is expected to change over its lifetime. This involves a
ten-fold increase in software content. Luckily, a lot of this can be
reused, or even packaged and sold.
The solution is not about tools, it’s about design flows. But it
doesn’t stop at silicon. It’s about flows from ideas to silicon to
products. To illustrate, a telematics system in a car is a very big
end-to-end system that even includes communications to a server that exists
somewhere outside the car, and the components need to be able to change
dramatically over the lifetime of the car.
Some of the hard problems being worked on in the software world are
things like security, management (configuration, provisioning, and updating
of systems in the field), system reliability (robustness to both hardware
and software failures, environmental changes, and malicious attacks), and
new applications that need to be implemented very quickly. New
products are expected to duplicate the rich PC experience people have become
familiar with, but in smaller, cheaper devices. At the same time,
complex devices are becoming commodities, and silicon architectures are
rapidly changing.
To cope in this brave new world, it’s necessary to think at multiple
levels of abstraction. For its part, Wind River has come up with a new
programming model for the heterogeneous multi-core system that it calls
“Virtual Single Processor,” which has a connection to the host server and
makes high-level services available from any node.
Eventually it comes around to the question of “what is software, and how
does it differ from IP?” The boundary is actually becoming quite
fuzzy. For example, PAVE makes a chip for reconfigurable computing,
and the only way to configure the gates in this chip is to go through its
hard core. So Wind River makes software for the hard core that
communicates with the gates as well as the outside world. This is a
truly dynamically reconfigurable computer that can be run by the hard core,
or within the gates.
It seems that today, the value is no longer in the chips, but in
intellectual property (IP). A major disconnect, however, is that the
EDA industry pretty much gives IP away, while the embedded industry sells IP
as its primary product. IP rights, values, and expectations are
changing. Companies are grappling with questions such how IP is
licensed, patented, copyrighted, and distributed. How do you charge
for it, and where do services fit in?
Fiddler believes that at a high level, the system design flow is actually
very fluid and dynamic, and cannot even be drawn precisely. We are in
a very complicated situation right now. Very difficult problems at the
system level affect both software and silicon – problems such as
communications, security, management, and reliability. As a result,
customers need a very different kind of help today, because they are solving
complex problems with minimal resources.
Fiddler wonders if we are making a world that is too complex to build and
manage. He feels that the only answer is to raise the level of
abstraction, and recognize that the real value is in solving difficult
end-to-end problems.
Sugar: For Property-Based SOC Verification
Sugar is the name of a formal property language from IBM that was
recently selected by Accellera, an EDA standards body, as an industry
standard for formal property specification.
TransEDA is a U.K.-based EDA vendor that is leading an effort to use this
new standard in its integrated verification solutions. Its
Verification Navigator is an integrated design verification environment that
provides solutions for test automation, HDL checking, coverage analysis,
dynamic property checking, and test suite analysis for Verilog, VHDL, and
duel-language designs. One of the tools in the suite, VN-Property DX,
is a dynamic property checker that verifies properties in system simulation
using a set of pre-defined or user-defined properties. These
properties become a common specification for use in the other verification
tools as well.
Property-driven verification increases productivity.
Source: TransEDA
This methodology bridges the gap between formal verification and
simulation. It allows designers to start verification at the
architectural level and thus accelerate verification of complex systems by
reducing simulation runs. Since a one-line property is equal to fifty
lines of Verilog code, users can create complex checks much more quickly
than before. TransEDA’s tool allows properties to be captured
graphically, and the properties are saved as editable Sugar files.
What Was Hot
The following electronic design automation companies introduced new
technology at DAC that is particularly interesting:
